1. Technical Field
The present invention relates to a load fluctuation compensation circuit, an electronic device, a test apparatus, and a load fluctuation compensation method. In particular, the present invention relates to a load fluctuation compensation circuit for compensating the power source voltage supplied to the operation circuit.
2. Related Art
Conventionally, in such components as an integrated circuit that includes a logic circuit configured by a CMOS or the like, the logic circuit is driven by a source power supplied from outside. For example, a power source metal interconnect layer formed in an integrated circuit chip is connected to an outside power source with bond wires or the like. Each logic circuit of the integrated circuit receives a source power by being connected with the power source metal interconnect layer. In other words, the logic circuits of an integrated circuit are driven by a common power source.
In such a configuration, the power source voltage supplied to each logic circuit depends on the driving state of the other logic circuits. This is detailed as follows. The power source current consumed by one logic circuit fluctuates depending on the driving state of the logic circuit. However, the logic circuit receives a source power via the bond wires or the metal interconnect as stated above. Therefore, when the power source current consumed by the other logic circuits fluctuates, the resultant resistance component changes the power source voltage supplied to the logic circuit accordingly.
A logic circuit is subjected to a load fluctuation and so the power source voltage fluctuates as the power current fluctuates. However, the conventional technology only enables fluctuation compensation of a relatively low frequency, and is often not adapted to compensate the fluctuation of the power source voltage in the above-stated case.
A balance circuit has already been known to reduce the stated fluctuation of the power source voltage, by balancing the entire power source current consumption by a circuit to be constant (e.g. Patent Document 1: Japanese Patent Application Publication No. 11-74768, page 4, FIG. 1). The disclosed balance circuit detects the time in which a pulse passes through a logic circuit, calculates the power current consumed by the logic circuit based on the detected time, and consumes a dummy current that yields a substantially constant summation when added together with the calculated consumption current.
However, the conventional balance circuit has to use a multiple of elements for detecting the time in which a pulse passes and calculating a power current consumed by a logic circuit, and so requires a large circuitry size which tends to increase the entire power current consumed by a circuit.
In view of the above, as an aspect, it is an advantage of the present invention to provide a load fluctuation compensation circuit,. an electronic device, a test apparatus, and a load fluctuation compensation method, which are able to solve the above-stated problems. This advantage is achieved by combinations of the features described in the independent claims. The dependent claims further define advantageous concrete examples of the present invention.